Hosted riscv32 refuses Nil Python for an arena nothing reads

The refusal was in EmitProgramEntryForTarget's riscv32 arm. It fired when the Nil Python driver asked for a heap arena on a hosted profile.

Why lifting it is safe

• Every writer of BSS_HEAP_PTR/BSS_HEAP_END was checked (grep -rn over compiler/, including the builtin units). The only reader is the x86-64 inline allocator in symtab.inc.
• builtinheap's HeapPtr is a different variable. It is filled by HeapMmap, whose riscv32 arm is the generic mmap (222). Under qemu-riscv32 -strace it shows as a successful mmap2(NULL,268435456,...,MAP_PRIVATE|MAP_ANONYMOUS,-1,0).
• On xtensa this was measured, not only reasoned: an arena whose mmap failed still ran every row. See bug-a-nil-python-does-not-build-for-xtensa-call0.

Measured (2026-09-28, qemu-riscv32)

The following match their .expected:

• test_nilpy_sys_maxsize_follows_the_target.npy against .expected32 (the same file whose row used to assert the refusal);
• test_nilpy_cross32_values.py;
• test_nilpy_attribute_off_a_virtual_call_result.npy.

The row that asserted the refusal (test-core, next to the --threadsafe riscv32 guard) now runs that file, with the other two beside it.